This invention relates generally to semiconductor transistors, and more particularly the invention relates to a field effect transistor having a heterostructure quantum well as a conducting channel between a source and drain, each comprising a semiconductor alloy and having heterojunctions.
Cost effective scaling has become a major challenge in silicon MOSFET technology. Traditional techniques are starting to fail in reducing certain undesirable physical effects as device dimensions shrink down to the sub-0.1 micron regime. However, bandgap engineering can provide one more degree of freedom in device design. In order to reduce bulk punchthrough and drain-induced barrier lowering (DIBL), a type of heterojunction MOSFET (HJMOSFET) with band offset at the source/drain junctions has been proposed by Hareland, Tasch, and Mazier in "New Structural Approach For Reducing Punchthrough Current in Deep Submicrometer MOSFETs and Extending MOSFETs Scaling", IEEE Electronics Letters, Vol. 29, No. 21, pages 1894-1896, (October 1993), and in "Analysis of a Heterojunction MOSFET Structure For Deep Submicron Scaling", Proceedings of the 21st International Symp. on Compound Semiconductors, pages 18-22, (September 1994). See also Verheyen et al., "A Vertical Si/Si.sub.1-x Ge.sub.x Heterojunction pMOSFET With Reduced DIBL Sensitivity, Using a Novel Gate Dielectric Approach", 1999 International Symp. On VLSI Technology, System and Applications, pages 19-22 (1999). In this structure, Bandgap Engineering is performed horizontally to tailor the potential along the channel. Compared to a silicon control device, a HJMOSFET has lower off-state leakage current and a smaller subthreshold swing. However, the drive current in a HJMOSFET is normally 50-60% lower because most of the carriers have to quantum mechanically tunnel through the potential barrier between the source and drain. See also U.S. Pat. No. 5,155,571 which discloses a MOSFET in which source and drain are formed in a silicon substrate with a GeSi channel region therebetween.